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Shen-Yung Chen Phones & Addresses

  • Fremont, CA

Publications

Us Patents

Scaling By Early Deinterlacing

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US Patent:
2005000, Jan 13, 2005
Filed:
Jun 30, 2003
Appl. No.:
10/611451
Inventors:
Alexander MacInnis - Los Altos CA,
Greg Kranawetter - Saratoga CA,
Sandeep Bhatia - Bangalore,
Shen-Yung Chen - Fremont CA,
Mahadhevan Sivagururaman - Tirupur,
D. Srilakshmi - Bangalore,
International Classification:
H04N011/20
US Classification:
348448000, 348581000
Abstract:
Presented herein are a system, method, and apparatus for improving scaling with early deinterlacing. Interlaced frames are deinterlaced prior to scaling. Accordingly, the scaler scales an entire frame, in contrast to individual fields, thereby resulting in an improved scaling function.

Prioritization Of Real Time / Non-Real Time Memory Requests From Bus Compliant Devices

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US Patent:
2005013, Jun 23, 2005
Filed:
Dec 17, 2003
Appl. No.:
10/740085
Inventors:
Shen-Yung (Robin) Chen - Fremont CA,
International Classification:
G06F012/00
US Classification:
711151000
Abstract:
One or more methods and systems of prioritizing access of physical memory space to bus compliant devices in a computing device is presented. Prioritization is based on real time or non-real time device functionality. In one embodiment, the method of accessing physical memory space for use by a bus compliant device comprises receiving a memory request from the device through a data bus. In addition, the method comprises comparing addresses of the memory request to a range of memory addresses stored in a memory request comparator. In one embodiment, the system for prioritizing the access of physical memory space in response to memory requests comprises one or more device and/or bus drivers, and a memory request comparator. The one or more device and/or bus drivers facilitates implementation of address ranges within said memory request comparator for one or more bus compliant devices.
Shen-Yung Chen from Fremont, CA, age ~59 Get Report